Intel Xeon Phi | Page 28

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Cluster-Level Tuning of a Shallow Water Equation Solver on the Intel MIC Architecture

Andrey Vladimirov, Cliff Addison

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Tags: cfd, Fluid dynamics, intel mic, Intel Xeon Phi, MPI, OpenMP

May 13, 2014 by Andrey Vladimirov

Automatic Scheduling of Compute Kernels Across Heterogeneous Architectures

Robert F. Lyerly

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Tags: Compilers, Computer science, Heterogeneous systems, Intel Xeon Phi, Machine learning, nVidia, OpenCL, OpenMP, Task scheduling, Tesla C2075

May 9, 2014 by hgpu

Analysis of SuperLU Solvers on Intel MIC Architecture

Ahmet Duran, M. Serdar Celebi, Bora Akaydin, Mehmet Tuncel, Figen Oztoprak

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Tags: Computer science, Intel Xeon Phi, Linear Algebra, Sparse matrix

May 2, 2014 by hgpu

Address Selection for Efficient Barriers on the Intel Xeon Phi

Romain Dolbeau

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Tags: Computer science, Intel Xeon Phi, Performance

May 2, 2014 by hgpu

SUPERGLUE: A Shared Memory Framework Using Data Versioning for Dependency-Aware Task-Based Parallelization

Martin Tillenius

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Source codes

Tags: Algorithms, Computer science, Intel Xeon Phi, OpenMP, Package, Task scheduling

April 29, 2014 by hgpu

Self-Adaptive Multiprecision Preconditioners on Multicore and Manycore Architectures

Hartwig Anzt, Dimitar Lukarski, Stanimire Tomov, Jack Dongarra

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Tags: ATI, ATI Radeon HD 7970, Computer science, CUDA, Intel Xeon Phi, Linear Algebra, nVidia, OpenCL, Tesla K40

April 27, 2014 by hgpu

SWAPHI: Smith-Waterman Protein Database Search on Xeon Phi Coprocessors

Yongchao Liu, Bertil Schmidt

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Tags: Computer science, Intel Xeon Phi, Package, Smith-Waterman algorithm

April 21, 2014 by hgpu

Test-driving Intel Xeon Phi

Jianbin Fang, Henk Sips, Lilun Zhang, Chuanfu Xu, Yonggang Che, Ana Lucia Varbanescu

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Source codes

Tags: Computer science, Intel Xeon Phi, Package, Performance

April 13, 2014 by hgpu

Hardware/Software Vectorization for Closeness Centrality on Multi-/Many-Core Architectures

A.E. Sarıyuce, E. Saule, K. Kaya, U.V. Çatalyurek

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Tags: Algorithms, Graph theory, Intel Xeon Phi, Parallelization

March 29, 2014 by hgpu

H-LU Factorization on Many-Core Systems

Ronald Kriemann

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Tags: Algorithms, Computer science, Factorization, Intel Xeon Phi

March 14, 2014 by hgpu

High Performance Non-Blocking Collective Communication for Next Generation Infiniband Clusters

Krishna Kandalla

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Tags: Benchmarking, Computer science, InfiniBand, Intel Xeon Phi, Linear Algebra, MPI

March 14, 2014 by hgpu

Configuration and Benchmarks of Peer-to-Peer Communication over Gigabit Ethernet and InfiniBand in a Cluster with Intel Xeon Phi Coprocessors

Vadim Karpusenko and Andrey Vladimirov

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Tags: InfiniBand, Intel Xeon Phi, MPI, RDMA

March 12, 2014 by Andrey Vladimirov

SimSYCL: Synchronous, single-threaded, library-only SYCL implementation for debugging and verification

SimSYCL: A SYCL Implementation Targeting Development, Debugging, Simulation and Conformance

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

gpu_tracker: Python package for tracking and profiling GPU utilization in both desktop and high-performance computing environments

CIFAR-10 Airbench: 94% on CIFAR-10 in 3.29 second

94% on CIFAR-10 in 3.29 Seconds on a Single GPU

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

LOOPer: A Learned Automatic Code Optimizer For Polyhedral Compilers

OpenMC Monte Carlo Code

Performance Portable Monte Carlo Particle Transport on Intel, NVIDIA, and AMD GPUs

Polygeist: C/C++ frontend for MLIR

Retargeting and Respecializing GPU Workloads for Performance Portability

Parallel Gaussian process with kernel approximation in CUDA

See all packages

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high performance computing on graphics processing units: hgpu.org

Cluster-Level Tuning of a Shallow Water Equation Solver on the Intel MIC Architecture

Automatic Scheduling of Compute Kernels Across Heterogeneous Architectures

Analysis of SuperLU Solvers on Intel MIC Architecture

Address Selection for Efficient Barriers on the Intel Xeon Phi

SUPERGLUE: A Shared Memory Framework Using Data Versioning for Dependency-Aware Task-Based Parallelization

Self-Adaptive Multiprecision Preconditioners on Multicore and Manycore Architectures

SWAPHI: Smith-Waterman Protein Database Search on Xeon Phi Coprocessors

Test-driving Intel Xeon Phi

Hardware/Software Vectorization for Closeness Centrality on Multi-/Many-Core Architectures

H-LU Factorization on Many-Core Systems

High Performance Non-Blocking Collective Communication for Next Generation Infiniband Clusters

Configuration and Benchmarks of Peer-to-Peer Communication over Gigabit Ethernet and InfiniBand in a Cluster with Intel Xeon Phi Coprocessors

Recent source codes

SimSYCL: Synchronous, single-threaded, library-only SYCL implementation for debugging and verification

GPU plugin for PySCF

QArray

Celerity: High-level C++ for Accelerator Clusters

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

CIFAR-10 Airbench: 94% on CIFAR-10 in 3.29 second

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

OpenMC Monte Carlo Code

Polygeist: C/C++ frontend for MLIR

Parallel Gaussian process with kernel approximation in CUDA

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