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TTC: A Tensor Transposition Compiler for Multiple Architectures

Paul Springer, Aravind Sankaran, Paolo Bientinesi

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Tags: BLAS, Compilers, Computer science, CUDA, Intel Xeon Phi, Linear Algebra, Mathematical Software, nVidia, nVidia GeForce 840 M, Package, Performance, Tesla K40

July 8, 2016 by hgpu

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high performance computing on graphics processing units: hgpu.org

TTC: A Tensor Transposition Compiler for Multiple Architectures

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Featured events

9th International Workshop on OpenCL and SYCL, 2021

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The Fifth International Workshop on GPU Computing and AI (GCA), 2020

2nd International Conference on Frontiers of Intelligent Manufacturing and Automation (CFIMA’21), 2021

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