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TTC: A Tensor Transposition Compiler for Multiple Architectures

Paul Springer, Aravind Sankaran, Paolo Bientinesi

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Tags: BLAS, Compilers, Computer science, CUDA, Intel Xeon Phi, Linear Algebra, Mathematical Software, nVidia, nVidia GeForce 840 M, Package, Performance, Tesla K40

July 8, 2016 by hgpu

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high performance computing on graphics processing units: hgpu.org

TTC: A Tensor Transposition Compiler for Multiple Architectures

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International Conference on Intelligent Autonomous Systems (ICIAS), 2018

International Conference on Robotics and Intelligent System (ICRIS), 2018

International Conference on Image and Graphics Processing (ICIGP), 2018

8th International Conference on Bioscience, Biochemistry and Bioinformatics (ICBBB), 2018

The 10th International Conference on Computer Modeling and Simulation (ICCMS), 2018