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TTC: A Tensor Transposition Compiler for Multiple Architectures

Paul Springer, Aravind Sankaran, Paolo Bientinesi

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Tags: BLAS, Compilers, Computer science, CUDA, Intel Xeon Phi, Linear Algebra, Mathematical Software, nVidia, nVidia GeForce 840 M, Package, Performance, Tesla K40

July 8, 2016 by hgpu

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high performance computing on graphics processing units: hgpu.org

TTC: A Tensor Transposition Compiler for Multiple Architectures

Recent source codes

PASTA: A Parallel Sparse Tensor Algorithm Benchmark Suite

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Featured events

8th International Workshop on OpenCL, including SYCLCon, 2019

7th International Workshop on OpenCL, 2019

Distributed Heterogeneous Programming in C/C++ (DHPCC++), 2019

3rd International Workshop on Theoretical Approaches to Performance Evaluation, Modeling and Simulation (TAPEMS), 2019

International Conference on Frontiers of Neural Networks (ICFNN), 2019