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Fast Code Exploration for Pipeline Processing in FPGA Accelerators

Leandro de Souza Rosa

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Tags: Computer science, Design space exploration, FPGA, HLS, Thesis

September 8, 2019 by hgpu

Survey and Benchmarking of Machine Learning Accelerators

Albert Reuther, Peter Michaleas, Michael Jones, Vijay Gadepally, Siddharth Samsi, Jeremy Kepner

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Tags: ASIC, Benchmarking, Computer science, CUDA, FPGA, Machine learning, Neural networks, nVidia, nVidia Jetson TX1, nVidia Jetson TX2, Performance, TPU

September 1, 2019 by hgpu

Automatic Compiler Based FPGA Accelerator for CNN Training

Shreyas Kolala Venkataramanaiah, Yufei Ma, Shihui Yin, Eriko Nurvithadhi, Aravind Dasu, Yu Cao, Jae-sun Seo

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Tags: Code generation, Compilers, Computer science, Deep learning, FPGA, Neural networks

August 25, 2019 by hgpu

On-The-Fly Parallel Data Shuffling for Graph Processing on OpenCL-based FPGAs

Xinyu Chen, Ronak Bajaj, Yao Chen, Jiong He, Bingsheng He, Weng-Fai Wong, Deming Chen

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Tags: Computer science, FPGA, Graph theory, OpenCL

August 25, 2019 by hgpu

High Performance Computing via High Level Synthesis

Mehdi Roozmeh

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Tags: Computer science, Design space exploration, FPGA, Heterogeneous systems, HLS, Nearest neighbour, nVidia, OpenCL, Package, Signal processing, Thesis

August 18, 2019 by hgpu

Live Migration of FPGA Applications

Daniel Ly-Ma

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Tags: Computer science, FPGA, Thesis

August 11, 2019 by hgpu

Mapping a Guided Image Filter on the HARP Reconfigurable Architecture Using OpenCL

Thomas Faict, Erik H. D'Hollander, Bart Goossens

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Tags: Algorithms, Benchmarking, Computer science, FPGA, Heterogeneous systems, OpenCL

August 5, 2019 by hgpu

A Survey of Convolutional Neural Networks on Edge with Reconfigurable Computing

Mario P. Vestias

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Tags: CNN, Computer science, Deep learning, FPGA, Neural networks

August 5, 2019 by hgpu

FBLAS: Streaming Linear Algebra on FPGA

Tiziano De Matteis, Johannes de Fine Licht, Torsten Hoefler

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Tags: Computer science, FPGA, HLS, Linear Algebra, Package

July 28, 2019 by hgpu

A Power Efficient Neural Network Implementation on Heterogeneous FPGA and GPU Devices

Yuexuan Tu, Saad Sadiq, Yudong Tao, Mei-Ling Shyu, Shu-Ching Chen

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Tags: Computer science, Deep learning, Energy-efficient computing, FPGA, Neural networks, nVidia, nVidia Jetson TX2

July 28, 2019 by hgpu

Sorting on FPGAs using Merge Trees

Nikola Samardzic

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Tags: Algorithms, Computer science, FPGA, Sorting

July 21, 2019 by hgpu

On the Portability of CPU-Accelerated Applications via Automated Source-to-Source Translation

Paul Sathre, Mark Gardner, Wu-chun Feng

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Tags: AMD FirePro S9150, ATI, Compilers, Computer science, CUDA, FPGA, nVidia, OpenCL, Package, performance portability, Tesla K80

July 14, 2019 by hgpu

Over-synchronization in GPU Programs

profile_util: simple C++ library to report memory, timing, thread affinity

Profile Util library: A quick and easy way to get MPI, OpenMP and GPU runtime information

MaC: Mamba CPU performance predictor

MambaCPU: Enhanced Correlation Mining with State Space Models for CPU Performance Prediction

Mixed-precision finite element kernels

Mixed-precision finite element kernels and assembly: Rounding error analysis and hardware acceleration

SHMT: The Simultaneous and Heterogenous Multithreading project

General-Purpose Computing on Tensor Processors

Superpipeline: A Universal Approach for Reducing GPU Memory Usage in Large Models

EnergyUCB-Bandit

Online Energy Optimization in GPUs: A Multi-Armed Bandit Approach

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high performance computing on graphics processing units: hgpu.org

Fast Code Exploration for Pipeline Processing in FPGA Accelerators

Survey and Benchmarking of Machine Learning Accelerators

Automatic Compiler Based FPGA Accelerator for CNN Training

On-The-Fly Parallel Data Shuffling for Graph Processing on OpenCL-based FPGAs

High Performance Computing via High Level Synthesis

Live Migration of FPGA Applications

Mapping a Guided Image Filter on the HARP Reconfigurable Architecture Using OpenCL

A Survey of Convolutional Neural Networks on Edge with Reconfigurable Computing

FBLAS: Streaming Linear Algebra on FPGA

A Power Efficient Neural Network Implementation on Heterogeneous FPGA and GPU Devices

Sorting on FPGAs using Merge Trees

On the Portability of CPU-Accelerated Applications via Automated Source-to-Source Translation

Recent source codes

Kokkidio: Kokkos+Eigen - write fast, readable multi-platform code

LLaMA-Inference-Bench

MATAR

Over-synchronization in GPU Programs

profile_util: simple C++ library to report memory, timing, thread affinity

MaC: Mamba CPU performance predictor

Mixed-precision finite element kernels

SHMT: The Simultaneous and Heterogenous Multithreading project

Superpipeline: A Universal Approach for Reducing GPU Memory Usage in Large Models

EnergyUCB-Bandit

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