high performance computing on graphics processing units: hgpu.org

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High Performance Computing via High Level Synthesis

Mehdi Roozmeh

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Tags: Computer science, Design space exploration, FPGA, Heterogeneous systems, HLS, Nearest neighbour, nVidia, OpenCL, Package, Signal processing, Thesis

August 18, 2019 by hgpu

FBLAS: Streaming Linear Algebra on FPGA

Tiziano De Matteis, Johannes de Fine Licht, Torsten Hoefler

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Tags: Computer science, FPGA, HLS, Linear Algebra, Package

July 28, 2019 by hgpu

Exploring Portability and Performance of OpenCL FPGA Kernels on Intel HARPv2

Anthony M. Cabrera, Roger D. Chamberlain

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Tags: Computer science, FPGA, Heterogeneous systems, HLS, OpenCL

July 7, 2019 by hgpu

FPGA Implementation of Reduced Precision Convolutional Neural Networks

Muhammad Mohid Nabil

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Tags: Computer science, CUDA, Deep learning, FPGA, HLS, Image recognition, Machine learning, Neural networks, nVidia, nVidia GeForce GTX 1080, Precision, Thesis

May 12, 2019 by hgpu

The Study of the OpenCL Processing Models for the FPGA Devices

Piotr Szkotak, Pawel Russek, Kazimierz Wiatr

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Tags: AMD Radeon R9 290, ATI, Computer science, FPGA, HLS, nVidia, nVidia GeForce GTX 1080, OpenCL, Package

April 7, 2019 by hgpu

Software-Defined FPGA Accelerator Design for Mobile Deep Learning Applications

Panagiotis G. Mousouliotis, Loukas P. Petro

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Tags: Computer science, Deep learning, FPGA, HLS, Neural networks

February 17, 2019 by hgpu

Exploring FPGA-specific Optimizations for Irregular OpenCL Applications

Mohamed W. Hassan, Ahmed E. Helal, Peter M. Athanas, Wu-Chun Feng, Yasser Y. Hanafy

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Tags: Benchmarking, Computer science, FPGA, HLS, Linear Algebra, OpenCL, Package

January 20, 2019 by hgpu

AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning

Ameer Haj-Ali, Qijing Huang, William Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek

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Tags: Algorithms, Code generation, Compilers, Computer science, Deep learning, HLS, LLVM, Programming Languages

January 20, 2019 by hgpu

HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing

Yi-Hsiang Lai, Yuze Chi, Yuwei Hu, Jie Wang, Cody Hao Yu, Yuan Zhou, Jason Cong, Zhiru Zhang

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Tags: Algorithms, Compilers, Computer science, FPGA, Heterogeneous systems, HLS, OpenCL, Python

January 6, 2019 by hgpu

Hashing, Caching, and Synchronization: Memory Techniques for Latency Masking Multithreaded Applications

Skyler Arron Windh

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Tags: Computer science, FPGA, Hashing, HLS, OpenCL, Thesis

November 11, 2018 by hgpu

A Survey of FPGA-based Accelerators for Convolutional Neural Networks

Sparsh Mittal

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Tags: Algorithms, Artificial intelligence, Computer science, Deep learning, FPGA, HLS, Neural networks, OpenCL, survey

October 21, 2018 by hgpu

Towards Lattice Quantum Chromodynamics on FPGA devices

Grzegorz Korcyl, Piotr Korcyl

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Tags: FPGA, High Energy Physics - Lattice, HLS, Physics, QCD

October 13, 2018 by hgpu

Over-synchronization in GPU Programs

profile_util: simple C++ library to report memory, timing, thread affinity

Profile Util library: A quick and easy way to get MPI, OpenMP and GPU runtime information

MaC: Mamba CPU performance predictor

MambaCPU: Enhanced Correlation Mining with State Space Models for CPU Performance Prediction

Mixed-precision finite element kernels

Mixed-precision finite element kernels and assembly: Rounding error analysis and hardware acceleration

SHMT: The Simultaneous and Heterogenous Multithreading project

General-Purpose Computing on Tensor Processors

Superpipeline: A Universal Approach for Reducing GPU Memory Usage in Large Models

EnergyUCB-Bandit

Online Energy Optimization in GPUs: A Multi-Armed Bandit Approach

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high performance computing on graphics processing units: hgpu.org

High Performance Computing via High Level Synthesis

FBLAS: Streaming Linear Algebra on FPGA

Exploring Portability and Performance of OpenCL FPGA Kernels on Intel HARPv2

FPGA Implementation of Reduced Precision Convolutional Neural Networks

The Study of the OpenCL Processing Models for the FPGA Devices

Software-Defined FPGA Accelerator Design for Mobile Deep Learning Applications

Exploring FPGA-specific Optimizations for Irregular OpenCL Applications

AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning

HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing

Hashing, Caching, and Synchronization: Memory Techniques for Latency Masking Multithreaded Applications

A Survey of FPGA-based Accelerators for Convolutional Neural Networks

Towards Lattice Quantum Chromodynamics on FPGA devices

Recent source codes

Kokkidio: Kokkos+Eigen - write fast, readable multi-platform code

LLaMA-Inference-Bench

MATAR

Over-synchronization in GPU Programs

profile_util: simple C++ library to report memory, timing, thread affinity

MaC: Mamba CPU performance predictor

Mixed-precision finite element kernels

SHMT: The Simultaneous and Heterogenous Multithreading project

Superpipeline: A Universal Approach for Reducing GPU Memory Usage in Large Models

EnergyUCB-Bandit

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