high performance computing on graphics processing units: hgpu.org

hgpu.org » nVidia Quadro FX 1700

A GPU-based Framework for Real-time Free Viewpoint Television

Kyrylo Shegeda

View

Tags: Computer science, CUDA, GLSL, nVidia, nVidia Quadro FX 1700, nVidia Quadro FX 5800, Rendering, Thesis

November 3, 2014 by hgpu

GPU/CPU Parallel Computation of Material Damage

Jie Shen, Diego Vela, Ankita Singh, Kexing Song, Guoshang Zhang, Bradon LaFreniere, Hao Chen

View

Tags: CAD, Computed tomography, CT, CUDA, Materials Science, nVidia, nVidia Quadro FX 1700, Tesla C1060, Tomography

June 19, 2014 by hgpu

Parallel Firewalls on General-Purpose Graphics Processing Units

Kamal Chandra Reddy, Ankit Tharwani, Ch.Vamshi Krishna, Lakshminarayanan.V

View

Tags: Computer science, CUDA, Databases, Network communications, nVidia, nVidia Quadro FX 1700, Security

December 17, 2013 by hgpu

Acceleration of Functional Validation Using GPGPU

Lalith Suresh, Navaneeth Rameshan, M. S. Gaur, Mark Zwolinski, Vijay Laxmi

View

Tags: Algorithms, Benchmarking, Computer science, Electronic design automation, nVidia, nVidia Quadro FX 1700, Tesla C870

September 23, 2011 by hgpu

A GPU implementation for two MIMO-OFDM detectors

Teemu Nylanden, Janne Janhunen, Olli Silven, Markku J. Juntti

Tags: Algorithms, nVidia, nVidia Quadro FX 1700, Signal processing

April 25, 2011 by hgpu

A Versatile Software Systolic Execution Model for GPU Memory-Bound Kernels

A Versatile Software Systolic Execution Model for GPU Memory-Bound Kernels

blockgmf: Block based approaches to Matrix Factorization

Block based Singular Value Decomposition approach to matrix factorization for recommender systems

CU2CL: A prototype CUDA-to-OpenCL source-to-source translator

On the Portability of CPU-Accelerated Applications via Automated Source-to-Source Translation

GPU-based Parallel Computation Support for Stan

GPU-based Parallel Computation Support for Stan

PANNA: Properties from Artificial Neural Network Architectures

PANNA: Properties from Artificial Neural Network Architectures

Artifact Evaluation for Novel methodologies for predictable CPU-to-GPU command offloading

Novel Methodologies for Predictable CPU-To-GPU Command Offloading

tvm: Open deep learning compiler stack for cpu, gpu and specialized accelerators

A Unified Optimization Approach for CNN Model Inference on Integrated GPUs

picongpu: Particle-in-Cell Simulations for the Exascale Era

PIConGPU: Predictive Simulations of Laser-Particle Accelerators with Manycore Hardware

WCCV: Warp-coherent Condition Vectorization(on top of RV)

WCCV: Improving the Vectorization of IF-statements with Warp-Coherent Conditions

Triton: An Intermediate Language and Compiler for Tiled Neural Network Computations

Triton: An Intermediate Language and Compiler for Tiled Neural Network Computations

See all packages

* * *

* * *

2019

May

13-15

Boston, USA

7th International Workshop on OpenCL, 2019

2019

May

13

Boston, MA, USA

Distributed Heterogeneous Programming in C/C++ (DHPCC++), 2019

2019

May

14

Larnaca, Cyprus

3rd International Workshop on Theoretical Approaches to Performance Evaluation, Modeling and Simulation (TAPEMS), 2019

2019

July

26-28

Rome, Italy

International Conference on Frontiers of Neural Networks (ICFNN), 2019

2019

July

26-28

Rome, Italy

International Conference on Frontiers of Artificial Intelligence and Machine Learning (FAIML), 2019

+

HGPU group © 2010-2019 hgpu.org

All rights belong to the respective authors

Login | Sitemap | Feedback | Policy

Contact us: