high performance computing on graphics processing units: hgpu.org

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hgpu.org » Applications » Computer science

Design and implementation of software-managed caches for multicores with local memory

Sangmin Seo, Jaejin Lee, Zehra Sura

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Tags: Cell processor, Computer science, Memory model, OpenMP

April 20, 2011 by hgpu

Compressing Floating-Point Number Stream for Numerical Applications

Hisanobu Tomari, Mary Inaba, Kei Hiraki

Tags: Algorithms, Compression, Computer science, FFT, FPGA, Matrix multiplication

April 20, 2011 by hgpu

HPP-Controller: An intra-node controller designed for connecting heterogeneous CPUs

Qiang Li, Panyong Zhang, Ninghui Sun

Tags: Cell processor, Computer science, FPGA, Heterogeneous systems, Memory, Performance

April 19, 2011 by hgpu

Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?

Eric S. Chung, Peter A. Milder, James C. Hoe, Ken Mai

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Tags: ASIC, ATI, ATI CAL, ATI Radeon HD 5870, Computer science, CUDA, FPGA, Heterogeneous systems, nVidia, nVidia GeForce GTX 285, nVidia GeForce GTX 480, Performance

April 19, 2011 by hgpu

A Hybrid Analytical DRAM Performance Model

George L. Yuan, Tor M. Aamodt

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Tags: Computer science, CUDA, Hardware Architecture, Memory, nVidia

April 19, 2011 by hgpu

Extending the Scalability of Single Chip Stream Processors with On-chip Caches

Ali Bakhoda, Tor M. Aamodt

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Tags: ATI, Computer science, Hardware Architecture, Memory, nVidia

April 19, 2011 by hgpu

A Task-centric Memory Model for Scalable Accelerator Architectures

John H. Kelm, Daniel R. Johnson, Steven S. Lumetta, Matthew I. Frank, Sanjay J. Patel

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Tags: Algorithms, Computer science, Hardware Architecture, Memory model

April 19, 2011 by hgpu

Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware

Wilson W. L. Fung, Ivan Sham, George Yuan, Tor M. Aamodt

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Tags: Computer science, CUDA, Hardware Architecture, nVidia, nVidia GeForce 8800 GTX, Performance, Warp level parallelism

April 19, 2011 by hgpu

Dynamic detection of uniform and affine vectors in GPGPU computations

Sylvain Collange, David Defour, Yao Zhang

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Tags: Algorithms, Computer science, CUDA, Hardware Architecture, nVidia, Optimization, Tesla

April 19, 2011 by hgpu

Parallel calculation of the median and order statistics on GPUs with application to robust regression

Gleb Beliakov

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Source codes

Tags: Algorithms, Computer science, CUDA, Data Structures and Algorithms, Numerical Analysis, nVidia, Package, Tesla C2050

April 19, 2011 by hgpu

Building a Personal High Performance Computer with Heterogeneous Processors

Qiang Li, Zhigang Huo, Ninghui Sun

Tags: Computer science, Heterogeneous systems, Performance

April 18, 2011 by hgpu

Many-Core vs. Many-Thread Machines: Stay Away From the Valley

Zvika Guz, Evgeny Bolotin, Idit Keidar, Avinoam Kolodny, Avi Mendelson, Uri C. Weiser

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Tags: ATI, Computer science, Intel, Larrabee, nVidia, Performance

April 18, 2011 by hgpu

torchPDLP: Primal-Dual Linear Programming in PyTorch. In collaboration with AMD and IPAM

Accelerating a Linear Programming Algorithm on AMD GPUs

Benchmarks for Dissecting CPU-GPU Unified Physical Memory on AMD MI300A APUs

Dissecting CPU-GPU Unified Physical Memory on AMD MI300A APUs

kvcached: Elastic KV cache for dynamic GPU sharing and efficient multi-LLM inference

Towards Efficient and Practical GPU Multitasking in the Era of LLM

Bandicoot: C++ library for GPU accelerated linear algebra

Bandicoot: A Templated C++ Library for GPU Linear Algebra

Luthier: Bridging Auto-Tuning and Vendor Libraries for Efficient Deep Learning Inference

Fused Kernel Library (FKL)

The Fused Kernel Library: A C++ API to Develop Highly-Efficient GPU Libraries

GPUHammer: Rowhammer Attacks on GPU Memories are Practical

See all packages

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high performance computing on graphics processing units: hgpu.org

Applications

Design and implementation of software-managed caches for multicores with local memory

Compressing Floating-Point Number Stream for Numerical Applications

HPP-Controller: An intra-node controller designed for connecting heterogeneous CPUs

Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?

A Hybrid Analytical DRAM Performance Model

Extending the Scalability of Single Chip Stream Processors with On-chip Caches

A Task-centric Memory Model for Scalable Accelerator Architectures

Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware

Dynamic detection of uniform and affine vectors in GPGPU computations

Parallel calculation of the median and order statistics on GPUs with application to robust regression

Building a Personal High Performance Computer with Heterogeneous Processors

Many-Core vs. Many-Thread Machines: Stay Away From the Valley

Recent source codes

CrossTL: Universal Programming Language & Translator

TBD-GPU

DG-SWEM - The Discontinuous Galerkin Shallow Water Equation Model

torchPDLP: Primal-Dual Linear Programming in PyTorch. In collaboration with AMD and IPAM

Benchmarks for Dissecting CPU-GPU Unified Physical Memory on AMD MI300A APUs

kvcached: Elastic KV cache for dynamic GPU sharing and efficient multi-LLM inference

Bandicoot: C++ library for GPU accelerated linear algebra

Luthier: Bridging Auto-Tuning and Vendor Libraries for Efficient Deep Learning Inference

Fused Kernel Library (FKL)

GPUHammer: Rowhammer Attacks on GPU Memories are Practical

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