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Discrete-event Execution Alternatives on General Purpose Graphical Processing Units (GPGPUs)

Kalyan S. Perumalla

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Tags: Brook, Computer science, Diffusion equation, DirectX, Hardware Architecture, nVidia, nVidia GeForce 6800

April 20, 2011 by hgpu

An efficient GPU implementation of the revised simplex method

J. Bieling, P. Peschlow, P. Martini

Tags: Computer science, Programming techniques

April 20, 2011 by hgpu

Tutorial 3: Methodologies and Performance Impacts of General Purpose Computing on GPUs

Shinichi Yamagiwa

Tags: Computer science, Review, Tutorial

April 20, 2011 by hgpu

Design and implementation of software-managed caches for multicores with local memory

Sangmin Seo, Jaejin Lee, Zehra Sura

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Tags: Cell processor, Computer science, Memory model, OpenMP

April 20, 2011 by hgpu

Compressing Floating-Point Number Stream for Numerical Applications

Hisanobu Tomari, Mary Inaba, Kei Hiraki

Tags: Algorithms, Compression, Computer science, FFT, FPGA, Matrix multiplication

April 20, 2011 by hgpu

HPP-Controller: An intra-node controller designed for connecting heterogeneous CPUs

Qiang Li, Panyong Zhang, Ninghui Sun

Tags: Cell processor, Computer science, FPGA, Heterogeneous systems, Memory, Performance

April 19, 2011 by hgpu

Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?

Eric S. Chung, Peter A. Milder, James C. Hoe, Ken Mai

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Tags: ASIC, ATI, ATI CAL, ATI Radeon HD 5870, Computer science, CUDA, FPGA, Heterogeneous systems, nVidia, nVidia GeForce GTX 285, nVidia GeForce GTX 480, Performance

April 19, 2011 by hgpu

Parallel Approaches for SWAMP Sequence Alignment

Shannon Steinfadt, Kevin Schaffer

Tags: Bioinformatics, Biology, Cell processor, FPGA, nVidia, Sequence alignment, Smith-Waterman algorithm

April 19, 2011 by hgpu

A Hybrid Analytical DRAM Performance Model

George L. Yuan, Tor M. Aamodt

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Tags: Computer science, CUDA, Hardware Architecture, Memory, nVidia

April 19, 2011 by hgpu

Extending the Scalability of Single Chip Stream Processors with On-chip Caches

Ali Bakhoda, Tor M. Aamodt

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Tags: ATI, Computer science, Hardware Architecture, Memory, nVidia

April 19, 2011 by hgpu

A Task-centric Memory Model for Scalable Accelerator Architectures

John H. Kelm, Daniel R. Johnson, Steven S. Lumetta, Matthew I. Frank, Sanjay J. Patel

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Tags: Algorithms, Computer science, Hardware Architecture, Memory model

April 19, 2011 by hgpu

Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware

Wilson W. L. Fung, Ivan Sham, George Yuan, Tor M. Aamodt

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Tags: Computer science, CUDA, Hardware Architecture, nVidia, nVidia GeForce 8800 GTX, Performance, Warp level parallelism

April 19, 2011 by hgpu

Over-synchronization in GPU Programs

profile_util: simple C++ library to report memory, timing, thread affinity

Profile Util library: A quick and easy way to get MPI, OpenMP and GPU runtime information

MaC: Mamba CPU performance predictor

MambaCPU: Enhanced Correlation Mining with State Space Models for CPU Performance Prediction

Mixed-precision finite element kernels

Mixed-precision finite element kernels and assembly: Rounding error analysis and hardware acceleration

SHMT: The Simultaneous and Heterogenous Multithreading project

General-Purpose Computing on Tensor Processors

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high performance computing on graphics processing units: hgpu.org

Applications

Discrete-event Execution Alternatives on General Purpose Graphical Processing Units (GPGPUs)

An efficient GPU implementation of the revised simplex method

Tutorial 3: Methodologies and Performance Impacts of General Purpose Computing on GPUs

Design and implementation of software-managed caches for multicores with local memory

Compressing Floating-Point Number Stream for Numerical Applications

HPP-Controller: An intra-node controller designed for connecting heterogeneous CPUs

Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?

Parallel Approaches for SWAMP Sequence Alignment

A Hybrid Analytical DRAM Performance Model

Extending the Scalability of Single Chip Stream Processors with On-chip Caches

A Task-centric Memory Model for Scalable Accelerator Architectures

Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware

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Over-synchronization in GPU Programs

profile_util: simple C++ library to report memory, timing, thread affinity

MaC: Mamba CPU performance predictor

Mixed-precision finite element kernels

SHMT: The Simultaneous and Heterogenous Multithreading project

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