high performance computing on graphics processing units: hgpu.org

Jehandad Khan, Paul Fultz, Artem Tamazov, Daniel Lowell, Chao Liu, Michael Melesse, Murali Nandhimandalam, Kamil Nasyrov, Ilya Perminov, Tejash Shah, Vasilii Filippov, Jing Zhang, Jing Zhou, Bragadeesh Natarajan, Mayank Daga

View

Download (PDF)

Source codes

Tags: Computer science, Deep learning, Neural networks, OpenCL, Package

October 6, 2019 by hgpu

Exascale Deep Learning for Scientific Inverse Problems

Nouamane Laanait, Joshua Romero, Junqi Yin, M. Todd Young, Sean Treichler, Vitalii Starchenko, Albina Borisevich, Alex Sergeev, Michael Matheson

View

Download (PDF)

Source codes

Tags: Computer science, Deep learning, Neural networks, nVidia, Package, Tesla V100

September 29, 2019 by hgpu

Performance and Power Evaluation of AI Accelerators for Training Deep Learning Models

Yuxin Wang, Qiang Wang, Shaohuai Shi, Xin He, Zhenheng Tang, Kaiyong Zhao, Xiaowen Chu

View

Download (PDF)

Tags: AI, AMD Radeon R7, ATI, Computer science, Deep learning, Neural networks, nVidia, PyTorch, TensorFlow, Tesla P100, Tesla V100, TPU

September 22, 2019 by hgpu

Neural Network Inference on Mobile SoCs

Siqi Wang, Anuj Pathania, Tulika Mitra

View

Download (PDF)

Tags: ARM, Computer science, Heterogeneous systems, Machine learning, Neural networks, SoC

September 8, 2019 by hgpu

Automated Architecture Design for Deep Neural Networks

Steven Abreu

View

Download (PDF)

Tags: Computer science, Deep learning, GPU cluster, Machine learning, Neural networks, nVidia, Tesla K80, Thesis

September 1, 2019 by hgpu

Survey and Benchmarking of Machine Learning Accelerators

Albert Reuther, Peter Michaleas, Michael Jones, Vijay Gadepally, Siddharth Samsi, Jeremy Kepner

View

Download (PDF)

Tags: ASIC, Benchmarking, Computer science, CUDA, FPGA, Machine learning, Neural networks, nVidia, nVidia Jetson TX1, nVidia Jetson TX2, Performance, TPU

September 1, 2019 by hgpu

Automatic Compiler Based FPGA Accelerator for CNN Training

Shreyas Kolala Venkataramanaiah, Yufei Ma, Shihui Yin, Eriko Nurvithadhi, Aravind Dasu, Yu Cao, Jae-sun Seo

View

Download (PDF)

Tags: Code generation, Compilers, Computer science, Deep learning, FPGA, Neural networks

August 25, 2019 by hgpu

* * *

high performance computing on graphics processing units: hgpu.org

A Computing Kernel for Network Binarization on PyTorch

Deep Learning Based FPGA-CPU Acceleration

A Highly Parameterizable Framework for Conditional Restricted Boltzmann Machine Based Workloads Accelerated With FPGAs and OpenCL

PyTorchPipe: a framework for rapid prototyping of pipelines combining language and vision

Performance Aware Convolutional Neural Network Channel Pruning for Embedded GPUs

MIOpen: An Open Source Library For Deep Learning Primitives

Exascale Deep Learning for Scientific Inverse Problems

Performance and Power Evaluation of AI Accelerators for Training Deep Learning Models

Neural Network Inference on Mobile SoCs

Automated Architecture Design for Deep Neural Networks

Survey and Benchmarking of Machine Learning Accelerators

Automatic Compiler Based FPGA Accelerator for CNN Training

Recent source codes

Kokkidio: Kokkos+Eigen - write fast, readable multi-platform code

LLaMA-Inference-Bench

MATAR

Over-synchronization in GPU Programs

profile_util: simple C++ library to report memory, timing, thread affinity

MaC: Mamba CPU performance predictor

Mixed-precision finite element kernels

SHMT: The Simultaneous and Heterogenous Multithreading project

Superpipeline: A Universal Approach for Reducing GPU Memory Usage in Large Models

EnergyUCB-Bandit

Most viewed papers (last 30 days)