high performance computing on graphics processing units: hgpu.org

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Pattern Recognition with Embedded Systems Technology: A Survey

Juan-Carlos Perez-Cortes, Jose-Luis Guardiola, Alberto-Jose Perez-Jimenez

Tags: Computer science, Computer vision, FPGA, Pattern recognition

July 4, 2011 by hgpu

A Simulator for the Cafadis Real Time 3DTV Camera

F. Perez Nava, J. Philip Luke, J. G. Marichal-Hernandez, F. Rosa, J. M. Rodriguez-Ramos

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Tags: Computer science, FPGA, nVidia, nVidia GeForce 7800 GTX, OpenGL, Real-time graphics, Rendering, Stereo vision

July 3, 2011 by hgpu

On the technology roadmap of Free-Viewpoint 3DTV receivers

E. Bondarev, R. Miquel, M. Imbert, S. Zinger, P.H.N. de With

Tags: Computer science, FPGA, Rendering

June 30, 2011 by hgpu

Overview of approaches for accelerating scale invariant feature detection algorithm

Jing Zhang, Hongshi Sang, Xubang Shen

Tags: Computer science, Computer vision, FPGA, SIFT

June 30, 2011 by hgpu

A Hybrid Computing Platform Digital Wideband Receiver Design and Performance Measurement

K. George, C.-I. H. Chen

Tags: FPGA, nVidia, Performance, Signal processing, Tesla C2050

June 30, 2011 by hgpu

Implementation and Performance Analysis of SEAL Encryption on FPGA, GPU and Multi-core Processors

Kostas Theoharoulis, Charalambos Antoniadis, Nikolaos Bellas, Christos D. Antonopoulos

Tags: Algorithms, Computer science, FPGA, Performance, Security

June 22, 2011 by hgpu

Scalable Streaming-Array of Simple Soft-Processors for Stencil Computations with Constant Memory-Bandwidth

Kentaro Sano, Yoshiaki Hatsuda, Satoru Yamamoto

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Tags: Computer science, FPGA, nVidia, Poster, Tesla C1060

June 21, 2011 by hgpu

Reconfigurable Control Variate Monte-Carlo Designs for Pricing Exotic Options

Anson H.T. Tse, David B. Thomas, K.H. Tsoi, Wayne Luk

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Tags: CUDA, Finance, FPGA, Monte Carlo simulation, nVidia, Tesla C1060

June 20, 2011 by hgpu

Architecture, Design, and Experimental Evaluation of a Lightfield Descriptor Depth Buffer Algorithm on Reconfigurable Logic and on a GPU

Matina Lakka, Grigorios Chrysos, Ioannis Papaefstathiou, Apostolos Dollas

Tags: Computer science, FPGA, Information Retrieval, nVidia, Performance

June 16, 2011 by hgpu

A Reconfigurable Processor for Phylogenetic Inference

Pei Liu, Ahmed Hemani, Kolin Paul

Tags: Computer science, Electronic design automation, FPGA, Performance

June 15, 2011 by hgpu

Accelerating Viola-Jones Face Detection to FPGA-Level Using GPUs

Daniel Hefenbrock, Jason Oberg, Nhat Tan Nguyen Thanh, Ryan Kastner, Scott B. Baden

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Tags: Computer science, Computer vision, CUDA, FPGA, GPU cluster, Image recognition, nVidia, nVidia GeForce GTX 285, nVidia GeForce GTX 295

June 15, 2011 by hgpu

FPGA Based High Performance and Scalable Block LU Decomposition Architecture

Manish Kumar Jaiswal, Nitin Chandrachoodan

Tags: Computer science, FPGA, Linear Algebra, Matrix decomposition

June 14, 2011 by hgpu

CL4SE: A Context Learning Benchmark For Software Engineering Tasks

CodeScaler: Scaling Code LLM Training and Test-Time Inference via Execution-Free Reward Models

A Safety Report on GPT-5.2, Gemini 3 Pro, Qwen3-VL, Grok 4.1 Fast, Nano Banana Pro, and Seedream 4.5

DICE: Diffusion Large Language Models Excel at Generating CUDA Kernels

KernelGYM & Dr. Kernel: A distributed GPU environment and a collection of RL training methods to support RL for Kernel Generations

Dr. Kernel: Reinforcement Learning Done Right for Triton Kernel Generations

Theorizer: from the paper Generating Literature-Driven Scientific Discoveries at Scale

Generating Literature-Driven Scientific Theories at Scale

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high performance computing on graphics processing units: hgpu.org

Pattern Recognition with Embedded Systems Technology: A Survey

A Simulator for the Cafadis Real Time 3DTV Camera

On the technology roadmap of Free-Viewpoint 3DTV receivers

Overview of approaches for accelerating scale invariant feature detection algorithm

A Hybrid Computing Platform Digital Wideband Receiver Design and Performance Measurement

Implementation and Performance Analysis of SEAL Encryption on FPGA, GPU and Multi-core Processors

Scalable Streaming-Array of Simple Soft-Processors for Stencil Computations with Constant Memory-Bandwidth

Reconfigurable Control Variate Monte-Carlo Designs for Pricing Exotic Options

Architecture, Design, and Experimental Evaluation of a Lightfield Descriptor Depth Buffer Algorithm on Reconfigurable Logic and on a GPU

A Reconfigurable Processor for Phylogenetic Inference

Accelerating Viola-Jones Face Detection to FPGA-Level Using GPUs

FPGA Based High Performance and Scalable Block LU Decomposition Architecture

Recent source codes

CL4SE: A Context Learning Benchmark For Software Engineering Tasks

CodeScaler: Scaling Code LLM Training and Test-Time Inference via Execution-Free Reward Models

A Safety Report on GPT-5.2, Gemini 3 Pro, Qwen3-VL, Grok 4.1 Fast, Nano Banana Pro, and Seedream 4.5

DICE: Diffusion Large Language Models Excel at Generating CUDA Kernels

KernelGYM & Dr. Kernel: A distributed GPU environment and a collection of RL training methods to support RL for Kernel Generations

Vortex-Optimized Light-weight Toolchain (VOLT)

SciDef: Automated Definition Extraction from Scientific Literature

bioagent-bench: Benchmark for evaluating LLM agents in bioinformatics

Benchmark suite for LLM inference on NVIDIA consumer GPUs

Theorizer: from the paper Generating Literature-Driven Scientific Discoveries at Scale

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