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Real-time semantic segmentation on FPGAs for autonomous vehicles with hls4ml

Nicolò Ghielmetti, Vladimir Loncar, Maurizio Pierini, Marcel Roed, Sioni Summers, Thea Aarrestad, Christoffer Petersson, Hampus Linander, Jennifer Ngadiuba, Kelvin Lin, Philip Harris

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Tags: Computer science, Deep learning, FPGA, Heterogeneous systems, HLS, Machine learning, Neural networks, Package

May 22, 2022 by hgpu

Improving Loop Parallelization by a Combination of Static and Dynamic Analyses in HLS

Florian Dewald, Johanna Rohde, Christian Hochberger, Heiko Mantel

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Tags: Computer science, FPGA, HLS, Package

February 13, 2022 by hgpu

Studying the Potential of Automatic Optimizations in the Intel FPGA SDK for OpenCL

Adel Ejjeh, Vikram Adve, Rob Rutenbar

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Tags: Computer science, Design space exploration, FPGA, HLS, OpenCL

January 16, 2022 by hgpu

Concurrency Mapping to FPGAs with OpenCL: A Case Study with a Shallow Water Kernel

Moteb Alghamdi, Graham Riley, Mike Ashworth

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Tags: Computer science, FPGA, HLS, HPC, OpenCL

November 28, 2021 by hgpu

FLOWER: A Comprehensive Dataflow Compiler for High-Level Synthesis

Puya Amiri, Arsene Perard-Gayot, Richard Membarth, Philipp Slusallek, Roland Leißa, Sebastian Hack

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Tags: Computer science, Computer vision, FPGA, HLS, Image processing, OpenCL

November 21, 2021 by hgpu

Accelerating LBM on a Tightly-Coupled Field Programmable Gate Array

Mateo Vázquez Maceiras

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Tags: cfd, Fluid dynamics, FPGA, HLS, Lattice Boltzmann model, OpenCL, Thesis

October 17, 2021 by hgpu

HLS Portability from Intel to Xilinx: A Case Study

Zhili Xiao, Roger D. Chamberlain, Anthony M. Cabrera

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Tags: Benchmarking, Compilers, Computer science, FPGA, HLS, OpenCL, Package

October 3, 2021 by hgpu

ScaleHLS: Scalable High-Level Synthesis through MLIR

Hanchen Ye, Cong Hao, Jianyi Cheng, Hyunmin Jeong, Jack Huang, Stephen Neuendorffer, Deming Chen

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Tags: Computer science, Design space exploration, FPGA, HLS, Neural networks, Package

August 8, 2021 by hgpu

StreamBlocks: A compiler for heterogeneous dataflow computing

Endri Bezati, Mahyar Emami, Jörn Janneck, James Larus

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Tags: Computer science, FPGA, Heterogeneous systems, HLS, OpenCL, Package, Performance

July 25, 2021 by hgpu

OpenCL FPGA Optimization guided by memory accesses and roofline model analysis applied to tomography acceleration

Daouda Diakite, Nicolas Gac, Maxime Martelli

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Tags: Computed tomography, Computer science, CT, FPGA, HLS, Medicine, OpenCL, Tomography

July 18, 2021 by hgpu

HALF: Holistic Auto Machine Learning for FPGAs

Jonas Ney, Dominik Loroch, Vladimir Rybalkin, Nico Weber, Jens Krüger, Norbert Wehn

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Tags: Computer science, Design space exploration, FPGA, HLS, Machine learning, Neural networks

July 4, 2021 by hgpu

Using Workload Characterization to Guide High Performance Graph Processing

Mohamed W. Hassan

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Tags: Computer science, FPGA, Heterogeneous systems, HLS, nVidia, OpenCL, Optimization, Tesla K20, Thesis

May 30, 2021 by hgpu

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

gpu_tracker: Python package for tracking and profiling GPU utilization in both desktop and high-performance computing environments

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

LOOPer: A Learned Automatic Code Optimizer For Polyhedral Compilers

OpenMC Monte Carlo Code

Performance Portable Monte Carlo Particle Transport on Intel, NVIDIA, and AMD GPUs

Polygeist: C/C++ frontend for MLIR

Retargeting and Respecializing GPU Workloads for Performance Portability

Parallel Gaussian process with kernel approximation in CUDA

Optical flow algorithms for SYCL

SYCL in the edge: performance and energy evaluation for heterogeneous acceleration

OpenMP5-Offload-OpenMC-Intel-PVC

Distributed OpenMP Offloading of OpenMC on Intel GPU MAX Accelerators

See all packages

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high performance computing on graphics processing units: hgpu.org

Real-time semantic segmentation on FPGAs for autonomous vehicles with hls4ml

Improving Loop Parallelization by a Combination of Static and Dynamic Analyses in HLS

Studying the Potential of Automatic Optimizations in the Intel FPGA SDK for OpenCL

Concurrency Mapping to FPGAs with OpenCL: A Case Study with a Shallow Water Kernel

FLOWER: A Comprehensive Dataflow Compiler for High-Level Synthesis

Accelerating LBM on a Tightly-Coupled Field Programmable Gate Array

HLS Portability from Intel to Xilinx: A Case Study

ScaleHLS: Scalable High-Level Synthesis through MLIR

StreamBlocks: A compiler for heterogeneous dataflow computing

OpenCL FPGA Optimization guided by memory accesses and roofline model analysis applied to tomography acceleration

HALF: Holistic Auto Machine Learning for FPGAs

Using Workload Characterization to Guide High Performance Graph Processing

Recent source codes

QArray

Celerity: High-level C++ for Accelerator Clusters

CIFAR-10 Airbench: 94% on CIFAR-10 in 3.29 second

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

OpenMC Monte Carlo Code

Polygeist: C/C++ frontend for MLIR

Parallel Gaussian process with kernel approximation in CUDA

Optical flow algorithms for SYCL

OpenMP5-Offload-OpenMC-Intel-PVC

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