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hgpu.org » Stencil computation

Delivering Performance-Portable Stencil Computations on CPUs and GPUs Using Bricks

Tuowen Zhao, Samuel Williams, Mary Hall, Hans Johansen

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Tags: Computer science, CUDA, Intel Xeon Phi, nVidia, performance portability, Stencil computation, Tesla P100

December 16, 2018 by hgpu

A Strategy for Automatic Performance Tuning of Stencil Computations on GPUs

Joseph D. Garvey, Tarek S. Abdelrahman

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Tags: AMD Radeon R9 390, ATI, Computer science, Machine learning, nVidia, nVidia GeForce GTX Titan, OpenCL, Performance, Stencil computation

April 28, 2018 by hgpu

Automatic Optimization of OpenCL-Based Stencil Codes for FPGAs and Its Evaluation

Tsukasa Endo, Hasitha Muthumala Waidyasooriya, Masanori Hariyama

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Tags: Computer science, FPGA, OpenCL, Performance, Stencil computation

April 15, 2018 by hgpu

Combined Spatial and Temporal Blocking for High-Performance Stencil Computation on FPGAs Using OpenCL

Hamid Reza Zohouri, Artur Podobas, Satoshi Matsuoka

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Tags: Computer science, FPGA, OpenCL, Stencil computation

February 9, 2018 by hgpu

Improving 3D Lattice Boltzmann Method stencil with asynchronous transfers on many-core processors

Minh Quan Ho, Christian Obrecht, Bernard Tourancheau, Benoit Dupont de Dinechin, Julien Hascoet

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Tags: cfd, Fluid dynamics, Lattice Boltzmann model, OpenCL, Stencil computation

December 19, 2017 by hgpu

Beyond 16GB: Out-of-Core Stencil Computations

Istvan Z. Reguly, Gihan R. Mudalige, Michael B. Giles

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Tags: Computer science, CUDA, Intel Xeon Phi, MPI, nVidia, Stencil computation, Tesla P100

September 9, 2017 by hgpu

Snowflake: A Lightweight Portable Stencil DSL

Nathan Zhang, Michael Driscoll, Armando Fox, Charles Markley, Samuel Williams, Protonu Basu

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Tags: Code generation, Computer science, DSL, nVidia, OpenCL, Package, Python, Stencil computation, Tesla K20

July 2, 2017 by hgpu

Tuning Stencil Codes in OpenCL for FPGAs

Qi Jia, Huiyang Zhou

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Tags: Computer science, FPGA, Heterogeneous systems, OpenCL, Package, Stencil computation

September 22, 2016 by hgpu

A parallel pattern for iterative stencil + reduce

M. Aldinucci, M. Danelutto, M. Drocco, P. Kilpatrick, C. Misale, G. Peretti Pezzi, M. Torquati

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Tags: ARM, Computer science, nVidia, OpenCL, Stencil computation, Tesla K40, Tesla M2090

September 17, 2016 by hgpu

A Performance Model and Optimization Strategies for Automatic GPU Code Generation of PDE Systems Described by a Domain-Specific Language

Yue Hu

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Tags: Code generation, Computer science, CUDA, DSL, Fluid dynamics, Intel Xeon Phi, nVidia, OpenCL, Package, PDEs, PTX, Stencil computation, Tesla K20, Thesis

August 31, 2016 by hgpu

MODESTO: Data-centric Analytic Optimization of Complex Stencil Programs on Heterogeneous Architectures

Tobias Gysi, Tobias Grosser, Torsten Hoefler

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Tags: Analytical model, CUDA, nVidia, Optimization, Package, Stencil computation, Tesla K20

June 3, 2016 by gysit

A Stencil DSEL for Single Code Accelerated Computing with SYCL

Olivier Aumage, Denis Barthou, Alexandre Honorat

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Tags: Computer science, OpenCL, Stencil computation, SYCL

March 29, 2016 by hgpu

CLUEstering: a high-performance density-based clustering library for scientific computing

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high performance computing on graphics processing units: hgpu.org

Delivering Performance-Portable Stencil Computations on CPUs and GPUs Using Bricks

A Strategy for Automatic Performance Tuning of Stencil Computations on GPUs

Automatic Optimization of OpenCL-Based Stencil Codes for FPGAs and Its Evaluation

Combined Spatial and Temporal Blocking for High-Performance Stencil Computation on FPGAs Using OpenCL

Improving 3D Lattice Boltzmann Method stencil with asynchronous transfers on many-core processors

Beyond 16GB: Out-of-Core Stencil Computations

Snowflake: A Lightweight Portable Stencil DSL

Tuning Stencil Codes in OpenCL for FPGAs

A parallel pattern for iterative stencil + reduce

A Performance Model and Optimization Strategies for Automatic GPU Code Generation of PDE Systems Described by a Domain-Specific Language

MODESTO: Data-centric Analytic Optimization of Complex Stencil Programs on Heterogeneous Architectures

A Stencil DSEL for Single Code Accelerated Computing with SYCL

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