high performance computing on graphics processing units: hgpu.org

Gregor Daiß, Patrick Diehl, Jiakun Yan, John K. Holmen, Rahulkumar Gayatri, Christoph Junghans, Alexander Straub, Jeff R. Hammond, Dominic Marcello, Miwako Tsuji, Dirk Pflüger, Hartmut Kaiser

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Tags: AMD Radeon Instinct MI100, AMD Radeon Instinct MI250X, Astrophysics, ATI, Computer science, CUDA, Heterogeneous systems, HIP, HPC, nVidia, nVidia A100, Package, performance portability, Physics

December 29, 2024 by hgpu

Development of a new framework for high performance volunteer computing

Ehab Saleh, B. S. Chandrasekar

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Tags: Computer science, Distributed computing, Heterogeneous computing, HPC

December 29, 2024 by hgpu

HPC-Coder-V2: Studying Code LLMs Across Low-Resource Parallel Languages

Aman Chaturvedi, Daniel Nichols, Siddharth Singh, Abhinav Bhatele

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Tags: Code generation, Computer science, CUDA, HIP, HPC, LLM, MPI, nVidia, nVidia A100, OpenMP, Package

December 24, 2024 by hgpu

Reproducible Study and Performance Analysis of GPU Programming Paradigms: OpenACC vs. CUDA in Key Linear Algebra Computations

Ezhilmathi Krishnasamy, Pascal Bouvry

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Tags: BLAS, Computer science, CUDA, Differential equations, HPC, Linear Algebra, Matrix multiplication, nVidia, nVidia A100, OpenACC, Package, Partial differential equations, PDEs, Performance

December 24, 2024 by hgpu

Analyzing the Performance Portability of SYCL across CPUs, GPUs, and Hybrid Systems with Protein Database Search

Manuel Costanzo, Enzo Rucci, Carlos García-Sánchez, Marcelo Naiouf, Manuel Prieto-Matías

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Tags: AMD Radeon RX 6700 XT, AMD Radeon RX Vega 6, ATI, Bioinformatics, Biology, Computer science, CUDA, Databases, Heterogeneous systems, HPC, Intel, Intel Arc A770, Intel UHD 630, Intel UHD 770, nVidia, nVidia GeForce GTX 1080, nVidia GeForce GTX 980, nVidia GeForce RTX 2070, nVidia GeForce RTX 3070, nVidia GeForce RTX 3090, oneAPI, Package, performance portability, SYCL, Tesla V100

December 15, 2024 by hgpu

Performance portability via C++ PSTL, SYCL, OpenMP, and HIP: the Gaia AVU-GSR case study

Giulio Malenza, Valentina Cesare, Marco Edoardo Santimaria, Robert Birke, Alberto Vecchiato, Ugo Becciani, Marco Aldinucci

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Tags: AMD Radeon Instinct MI250X, Astrophysics, ATI, Computer science, CUDA, HIP, HPC, nVidia, nVidia A100, nVidia H100, nVidia V100, OpenMP, Package, Performance, performance portability, SYCL, Tesla T4

November 24, 2024 by hgpu

LLload: An Easy-to-Use HPC Utilization Tool

Chansup Byun, Albert Reuther, Julie Mullen, LaToya Anderson, William Arcand, Bill Bergeron, David Bestor, Alexander Bonn, Daniel Burrill, Vijay Gadepally, Michael Houle, Matthew Hubbell, Hayden Jananthan, Michael Jones, Piotr Luszczek, Peter Michaleas, Lauren Milechin, Guillermo Morales, Andrew Prout, Antonio Rosa, Charles Yee, Jeremy Kepner

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Tags: Computer science, CUDA, HPC, nVidia, Performance

November 3, 2024 by hgpu

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high performance computing on graphics processing units: hgpu.org

Modernization and Optimization of MPI Codes

Adaptive Optimization Techniques for High-Performance Computing

Data Parallel Visualization and Rendering on the RAMSES Supercomputer with ANARI

Performant Automatic BLAS Offloading on Unified Memory Architecture with OpenMP First-Touch Style Data Movement

Scalable Access-Pattern Aware I/O Acceleration and Multi-Tiered Data Management for HPC and AI Workloads

Asynchronous-Many-Task Systems: Challenges and Opportunities – Scaling an AMR Astrophysics Code on Exascale machines using Kokkos and HPX

Development of a new framework for high performance volunteer computing

HPC-Coder-V2: Studying Code LLMs Across Low-Resource Parallel Languages

Reproducible Study and Performance Analysis of GPU Programming Paradigms: OpenACC vs. CUDA in Key Linear Algebra Computations

Analyzing the Performance Portability of SYCL across CPUs, GPUs, and Hybrid Systems with Protein Database Search

Performance portability via C++ PSTL, SYCL, OpenMP, and HIP: the Gaia AVU-GSR case study

LLload: An Easy-to-Use HPC Utilization Tool

Recent source codes

Kernel Library for LLM Serving

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Pinocchio: PINpointing Orbit Crossing Collapsed Hierarchical Objects

KernelCoder: trained on a curated dataset of reasoning traces and CUDA kernel pairs

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