high performance computing on graphics processing units: hgpu.org

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Solving MaxSAT with Matrix Multiplication

David Warde-Farley, Vinod Nair, Yujia Li, Ivan Lobov, Felix Gimeno, Simon Osindero

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Tags: AI, Artificial intelligence, Computer science, Matrix multiplication, Neural networks, TPU

November 12, 2023 by hgpu

Redco: A Lightweight Tool to Automate Distributed Training of LLMs on Any GPU/TPUs

Bowen Tan, Yun Zhu, Lijuan Liu, Hongyi Wang, Yonghao Zhuang, Jindong Chen, Eric Xing, Zhiting Hu

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Tags: Computer science, Deep learning, Distributed computing, nVidia, nVidia A100, Package, TPU

November 5, 2023 by hgpu

Benchmarking GPU and TPU Performance with Graph Neural Networks

Xiangyang Ju, Yunsong Wang, Daniel Murnane, Nicholas Choma, Steven Farrell, Paolo Calafiura

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Tags: Artificial intelligence, Benchmarking, Computer science, CUDA, Deep learning, Machine learning, Neural networks, nVidia, nVidia A100, Pattern recognition, Tesla V100, TPU

October 30, 2022 by hgpu

TPU-KNN: K Nearest Neighbor Search at Peak FLOP/s

Felix Chern, Blake Hechtman, Andy Davis, Ruiqi Guo, David Majnemer, Sanjiv Kumar

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Tags: Algorithms, Computer science, Nearest neighbour, nVidia, nVidia A100, Tesla V100, TPU

July 3, 2022 by hgpu

QGTC: Accelerating Quantized GNN via GPU Tensor Core

Yuke Wang, Boyuan Feng, Yufei Ding

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Tags: Computer science, CUDA, Deep learning, Neural networks, nVidia, nVidia GeForce RTX 3090, TPU

November 21, 2021 by hgpu

GPTPU: Accelerating Applications using Edge Tensor Processing Units

Kuan-Chieh Hsu, Hung-Wei Tseng

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Tags: Algorithms, Artificial intelligence, Computer science, CUDA, Machine learning, Neural networks, nVidia, OpenCL, TPU

July 18, 2021 by hgpu

LazyTensor: combining eager execution with domain-specific compilers

Alex Suhan, Davide Libenzi, Ailing Zhang, Parker Schuh, Brennan Saeta, Jie Young Sohn, Denys Shabalin

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Tags: Computer science, Deep learning, Package, Programming Languages, TPU

March 7, 2021 by hgpu

Benchmarking Modern Edge Devices for AI Applications

Pilsung Kang, Jongmin Jo

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Tags: Artificial intelligence, Benchmarking, Computer science, Deep learning, TPU

March 7, 2021 by hgpu

ELECTRA: Pre-training Text Encoders as Discriminators Rather Than Generators

Kevin Clark, Minh-Thang Luong, Quoc V. Le, Christopher D. Manning

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Tags: Computer science, NLP, nVidia, Package, Tesla V100, TPU

March 29, 2020 by hgpu

GPU Tensor Cores for fast Arithmetic Reductions

Cristóbal A. Navarro, Roberto Carrasco, Ricardo J. Barrientos, Javier A. Riquelme, Raimundo Vega

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Tags: Algorithms, Computer science, CUDA, Deep learning, Machine learning, nVidia, Tesla V100, TPU

January 19, 2020 by hgpu

ALBERT: A Lite BERT for Self-supervised Learning of Language Representations

Zhenzhong Lan, Mingda Chen, Sebastian Goodman, Kevin Gimpel, Piyush Sharma, Radu Soricut

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Tags: Artificial intelligence, Computer science, Deep learning, NLP, TPU

September 29, 2019 by hgpu

Performance and Power Evaluation of AI Accelerators for Training Deep Learning Models

Yuxin Wang, Qiang Wang, Shaohuai Shi, Xin He, Zhenheng Tang, Kaiyong Zhao, Xiaowen Chu

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Tags: AI, AMD Radeon R7, ATI, Computer science, Deep learning, Neural networks, nVidia, PyTorch, TensorFlow, Tesla P100, Tesla V100, TPU

September 22, 2019 by hgpu

CuPBoP-AMD: Extending CUDA to AMD Platforms

Creating a Dataset for High-Performance Computing Code Translation using LLMs: A Bridge Between OpenMP Fortran and C+

AFOCL: Portable OpenCL Programming of FPGAs via Automated Built-in Kernel Management

CHARM-SYCL: New Unified Programming Environment for Multiple Accelerator Types

pp-template: Template for Performance-Portable code development, targeting HOST-DEVICE computer architectures

An approach to performance portability through generic programming

See all packages

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high performance computing on graphics processing units: hgpu.org

Solving MaxSAT with Matrix Multiplication

Redco: A Lightweight Tool to Automate Distributed Training of LLMs on Any GPU/TPUs

Benchmarking GPU and TPU Performance with Graph Neural Networks

TPU-KNN: K Nearest Neighbor Search at Peak FLOP/s

QGTC: Accelerating Quantized GNN via GPU Tensor Core

GPTPU: Accelerating Applications using Edge Tensor Processing Units

LazyTensor: combining eager execution with domain-specific compilers

Benchmarking Modern Edge Devices for AI Applications

ELECTRA: Pre-training Text Encoders as Discriminators Rather Than Generators

GPU Tensor Cores for fast Arithmetic Reductions

ALBERT: A Lite BERT for Self-supervised Learning of Language Representations

Performance and Power Evaluation of AI Accelerators for Training Deep Learning Models

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AFOCL: Portable OpenCL Programming of FPGAs via Automated Built-in Kernel Management

CHARM-SYCL: New Unified Programming Environment for Multiple Accelerator Types

pp-template: Template for Performance-Portable code development, targeting HOST-DEVICE computer architectures

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