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hgpu.org » Applications » Computer science

CHARM-SYCL: New Unified Programming Environment for Multiple Accelerator Types

Norihisa Fujita, Beau Johnston, Ryohei Kobayashi, Keita Teranishi, Seyong Lee, Taisuke Boku, Jeffrey S. Vetter

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Tags: AMD Radeon Instinct MI100, ATI, Computer science, CUDA, Heterogeneous systems, nVidia, Package, performance portability, SYCL, Tesla V100

November 19, 2023 by hgpu

AFOCL: Portable OpenCL Programming of FPGAs via Automated Built-in Kernel Management

Topi Leppanen, Joonas Multanen, Leevi Leppänen, Pekka Jääskeläinen

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Tags: Computer science, FPGA, OpenCL, Package, performance portability

November 19, 2023 by hgpu

An approach to performance portability through generic programming

Andreas Hadjigeorgiou, Christodoulos Stylianou, Michele Weiland, Dirk Jacob Verschuur, Jacob Finkenrath

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Tags: AMD Radeon Instinct MI100, ATI, Benchmarking, Computer science, CUDA, HIP, HPC, nVidia, OpenMP, Package, Performance, performance portability, Portability, Tesla V100

November 12, 2023 by hgpu

Redco: A Lightweight Tool to Automate Distributed Training of LLMs on Any GPU/TPUs

Bowen Tan, Yun Zhu, Lijuan Liu, Hongyi Wang, Yonghao Zhuang, Jindong Chen, Eric Xing, Zhiting Hu

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Tags: Computer science, Deep learning, Distributed computing, nVidia, nVidia A100, Package, TPU

November 5, 2023 by hgpu

OpenRAND: A Performance Portable, Reproducible Random Number Generation Library for Parallel Computations

Shihab Shahriar Khan, Bryce Palmer, Christopher Edelmaierd, Hasan Metin Aktulga

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Tags: Computer science, CUDA, HPC, nVidia, nVidia A100, Package, Pseudo-random number generators, Tesla V100

November 5, 2023 by hgpu

Performance portability evaluation of blocked stencil computations on GPUs

Oscar Antepara, Hans Johansen, Samuel Williams, Tuowen Zhao, Samantha Hirsch, Priya Goyal, Mary Hall

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Tags: AMD Radeon Instinct MI250X, ATI, Code generation, Computer science, CUDA, HIP, nVidia, nVidia A100, Package, performance portability, Stencil computation, SYCL

October 29, 2023 by hgpu

SYCL in the Edge: Performance Evaluation for Heterogeneous Acceleration

Youssef Faqir-Rhazoui, Carlos García

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Tags: Computer science, CUDA, FPGA, Heterogeneous systems, nVidia, nVidia Jetson Nano, Optical flow, Package, SYCL

October 22, 2023 by hgpu

Strega: An HTTP Server for FPGAs

Fabio Maschi, Gustavo Alonso

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Tags: Computer science, FPGA, OpenCL, Package

October 15, 2023 by hgpu

Comparison of different n-body algorithms on various hardware platforms using SYCL

Tim Thüring

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Tags: AMD Radeon Pro VII, Astrophysics, ATI, Computer science, N-body simulation, nVidia, nVidia A100, nVidia GeForce RTX 3090, nVidia Quadro GP100, Package, Physics, SYCL, Thesis

October 15, 2023 by hgpu

Open SYCL on heterogeneous GPU systems: A case of study

Rocío Carratalá-Sáez, Francisco J. andújar, Yuri Torres, Arturo Gonzalez-Escribano, Diego R. Llanos

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Tags: Computer science, CUDA, Heterogeneous systems, HIP, nVidia, Package, performance portability, SYCL

October 15, 2023 by hgpu

Fortran performance optimisation and auto-parallelisation by leveraging MLIR-based domain specific abstractions in Flang

Nick Brown, Maurice Jamieson, Anton Lydike, Emilien Bauer, Tobias Grosser

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Tags: Computer science, Fortran, HPC, LLVM, MPI, nVidia, Package, Performance, Tesla V100

October 8, 2023 by hgpu

Advancing the distributed Multi-GPU ChASE library through algorithm optimization and NCCL library

Xinzhe Wu, Edoardo Di Napoli

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Tags: Algorithm optimization, Computer science, CUDA, MPI, nVidia, nVidia A100, OpenMP, OpenMPI, Package

October 8, 2023 by hgpu

Allo: Accelerator Design Language

Dato: A Task-Based Programming Model for Dataflow Accelerators

Towards Robust Agentic CUDA Kernel Benchmarking, Verification, and Optimization

torchPDLP: Primal-Dual Linear Programming in PyTorch. In collaboration with AMD and IPAM

Accelerating a Linear Programming Algorithm on AMD GPUs

Benchmarks for Dissecting CPU-GPU Unified Physical Memory on AMD MI300A APUs

Dissecting CPU-GPU Unified Physical Memory on AMD MI300A APUs

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high performance computing on graphics processing units: hgpu.org

Packages

CHARM-SYCL: New Unified Programming Environment for Multiple Accelerator Types

AFOCL: Portable OpenCL Programming of FPGAs via Automated Built-in Kernel Management

An approach to performance portability through generic programming

Redco: A Lightweight Tool to Automate Distributed Training of LLMs on Any GPU/TPUs

OpenRAND: A Performance Portable, Reproducible Random Number Generation Library for Parallel Computations

Performance portability evaluation of blocked stencil computations on GPUs

SYCL in the Edge: Performance Evaluation for Heterogeneous Acceleration

Strega: An HTTP Server for FPGAs

Comparison of different n-body algorithms on various hardware platforms using SYCL

Open SYCL on heterogeneous GPU systems: A case of study

Fortran performance optimisation and auto-parallelisation by leveraging MLIR-based domain specific abstractions in Flang

Advancing the distributed Multi-GPU ChASE library through algorithm optimization and NCCL library

Recent source codes

Allo: Accelerator Design Language

Towards Robust Agentic CUDA Kernel Benchmarking, Verification, and Optimization

HPC Benchmark Survey

HDM: Home made Diffusion Models

General Matrix Multiplication (GEMM)

CrossTL: Universal Programming Language & Translator

TBD-GPU

DG-SWEM - The Discontinuous Galerkin Shallow Water Equation Model

torchPDLP: Primal-Dual Linear Programming in PyTorch. In collaboration with AMD and IPAM

Benchmarks for Dissecting CPU-GPU Unified Physical Memory on AMD MI300A APUs

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