high performance computing on graphics processing units: hgpu.org

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HIPRT: A Ray Tracing Framework in HIP

Daniel Meister, Paritosh Kulkarni, Aaryaman Vasishta, Takahiro Harada

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Tags: 3D Graphics and Realism, AMD Radeon Pro W7900, ATI, HIP, Package, Raytracing, Rendering, Vulkan

August 14, 2024 by hgpu

Evaluating Operators in Deep Neural Networks for Improving Performance Portability of SYCL

Zheming Jin

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Tags: Benchmarking, Computer science, CUDA, HIP, Machine learning, Neural networks, nVidia, nVidia GeForce RTX 2080, nVidia GeForce RTX 3090, nVidia H100, oneAPI, Performance, performance portability, SYCL, Tesla A100, Tesla V100

August 14, 2024 by hgpu

A Comparison of OpenCL, CUDA, and HIP as Compilation Targets for a Functional Array Language

Troels Henriksen

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Tags: AMD Radeon Instinct MI100, ATI, Code generation, Computer science, CUDA, HIP, nVidia, nVidia A100, OpenCL, Package, Programming Languages

July 28, 2024 by hgpu

Bringing Auto-tuning to HIP: Analysis of Tuning Impact and Difficulty on AMD and Nvidia GPUs

Milo Lurati, Stijn Heldens, Alessio Sclocco, Ben van Werkhoven

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Tags: AMD Radeon Instinct MI250X, AMD Radeon Pro W6600, ATI, Computer science, CUDA, HIP, nVidia, nVidia A100, nVidia RTX A4000, Package, Performance, Python

July 28, 2024 by hgpu

Automatic Code Rewriting for Performance Portability

Alister Johnson

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Tags: Compilers, Computer science, HIP, OpenCL, OpenMP, performance portability, SYCL, Thesis

July 7, 2024 by hgpu

Stencil Computations on AMD and Nvidia Graphics Processors: Performance and Tuning Strategies

Johannes Pekkilä, Oskar Lappi, Fredrik Robertsén, Maarit J. Korpi-Lagg

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Tags: AMD Radeon Instinct MI100, AMD Radeon Instinct MI250X, ATI, Computer science, CUDA, Energy-efficient computing, HIP, nVidia, nVidia A100, nVidia V100, Package, Performance, PyTorch, Stencil computation

June 16, 2024 by hgpu

CuPBoP: Making CUDA a Portable Language

Ruobing Han, Jun Chen, Bhanu Garg, Xule Zhou, John Lu, Jeffrey Young, Jaewoong Sim, Hyesoon Kim

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Tags: Computer science, CUDA, HIP, nVidia, nVidia A30, OpenCL, Package, Portability, SYCL

May 12, 2024 by hgpu

Full-Scale File System Acceleration on GPU

Peter Maucher, Lennard Kittner, Nico Rath, Gregor Lucka, Lukas Werling, Yussuf Khalil, Thorsten Gröninger, Frank Bellosa

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Tags: AMD Radeon RX 6800, ATI, Computer science, Data Structures and Algorithms, HIP, Performance

March 24, 2024 by hgpu

Retargeting and Respecializing GPU Workloads for Performance Portability

Ivan R. Ivanov, Oleksandr Zinenko, Jens Domke, Toshio Endo, William S. Moses

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Tags: AMD Radeon Instinct MI210, AMD Radeon RX 6800, ATI, Computer science, CUDA, HIP, HPC, nVidia, nVidia A100, nVidia RTX A4000, Package, performance portability

March 24, 2024 by hgpu

Low-Overhead Trace Collection and Profiling on GPU Compute Kernels

Sébastien Darche, Michel R. Dagenais

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Tags: AMD Radeon Instinct MI100, ATI, Benchmarking, Computer science, CUDA, HIP, nVidia, Package, Performance, Profiling

March 3, 2024 by hgpu

An Evaluative Comparison of Performance Portability across GPU Programming Models

Joshua H. Davis, Pranav Sivaraman, Isaac Minn, Konstantinos Parasyris, Harshitha Menon, Giorgis Georgakoudis, Abhinav Bhatele

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Tags: AMD Radeon Instinct MI250X, AMD Radeon Instinct Mi50, ATI, Computer science, CUDA, Heterogeneous systems, HIP, MPI, nVidia, nVidia V100, OpenACC, OpenMP, Performance, performance portability, SYCL

February 18, 2024 by hgpu

Deductive verification for SYCL

Ellen Wittingen

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Tags: Computer science, CUDA, Heterogeneous systems, HIP, nVidia, OpenCL, OpenMP, Package, SYCL, Thesis

February 4, 2024 by hgpu

SCALE-Ahead-Of-Time Compilation of CUDA for AMD GPUs

LeetDecoding: A PyTorch Library for Exponentially Decaying Causal Linear Attention with CUDA Implementations

Anari-visionaray

Data Parallel Visualization and Rendering on the RAMSES Supercomputer with ANARI

PROM: an open-source software framework to enhance the robustness and performance of predictive models against such changes during deployment

Enhancing Deployment-Time Predictive Model Robustness for Code Analysis and Optimization

DeepSpeed: a deep learning optimization library that makes distributed training and inference easy, efficient, and effective

Scalable Access-Pattern Aware I/O Acceleration and Multi-Tiered Data Management for HPC and AI Workloads

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high performance computing on graphics processing units: hgpu.org

HIPRT: A Ray Tracing Framework in HIP

Evaluating Operators in Deep Neural Networks for Improving Performance Portability of SYCL

A Comparison of OpenCL, CUDA, and HIP as Compilation Targets for a Functional Array Language

Bringing Auto-tuning to HIP: Analysis of Tuning Impact and Difficulty on AMD and Nvidia GPUs

Automatic Code Rewriting for Performance Portability

Stencil Computations on AMD and Nvidia Graphics Processors: Performance and Tuning Strategies

CuPBoP: Making CUDA a Portable Language

Full-Scale File System Acceleration on GPU

Retargeting and Respecializing GPU Workloads for Performance Portability

Low-Overhead Trace Collection and Profiling on GPU Compute Kernels

An Evaluative Comparison of Performance Portability across GPU Programming Models

Deductive verification for SYCL

Recent source codes

SCALE-Ahead-Of-Time Compilation of CUDA for AMD GPUs

LeetDecoding: A PyTorch Library for Exponentially Decaying Causal Linear Attention with CUDA Implementations

Anari-visionaray

PROM: an open-source software framework to enhance the robustness and performance of predictive models against such changes during deployment

DeepSpeed: a deep learning optimization library that makes distributed training and inference easy, efficient, and effective

HPX: a C++ Standard Library for Concurrency and Parallelism

TorchQC: Quantum Dynamics and Machine Learning

Matrix multiplication using Tensor Cores in CUDA

CPP Joules: Energy Measurement tool for CPP/CUDA programs

HPC-Coder-v2

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