high performance computing on graphics processing units: hgpu.org

Roberto Ammendola, Andrea Biagioni, Ottorino Frezza, Francesca Lo Cicero, Pier Stanislao Paolucci, Alessandro Lonardo, Davide Rossetti, Francesco Simula, Laura Tosoratto, Piero Vicini

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Tags: Computer science, FPGA, GPU cluster, Hardware Architecture, nVidia

November 8, 2013 by hgpu

NaNet:a low-latency NIC enabling GPU-based, real-time low level trigger systems

Roberto Ammendola, Andrea Biagioni, Riccardo Fantechi, Ottorino Frezza, Gianluca Lamanna, Francesca Lo Cicero, Alessandro Lonardo, Pier Stanislao Paolucci, Felice Pantaleo, Roberto Piandani, Luca Pontisso, Davide Rossetti, Francesco Simula, Marco Sozzi, Laura Tosoratto, Piero Vicini

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Tags: CUDA, FPGA, nVidia, Physics, Tesla K20, Tesla M2070

November 6, 2013 by hgpu

High-performance Dynamic Programming on FPGAs with OpenCL

Sean O. Settle

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Tags: Bioinformatics, Computer science, FPGA, Heterogeneous systems, OpenCL, RNA, Smith-Waterman algorithm

October 29, 2013 by hgpu

FlexGrip: A Soft GPGPU for FPGAs

Kevin Andryc, Murtaza Merchant, Russell Tessier

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Tags: Computer science, CUDA, FPGA, nVidia

October 19, 2013 by hgpu

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

gpu_tracker: Python package for tracking and profiling GPU utilization in both desktop and high-performance computing environments

high performance computing on graphics processing units: hgpu.org

Back Ground Subtraction Algorithm For Moving Object Detection In FPGA

The battle of the giants: a case study of GPU vs FPGA optimisation for real-time image processing

A Scalable Hybrid FPGA/GPU FX Correlator

On the Portability of the OpenCL Dwarfs on Fixed and Reconfigurable Parallel Platforms

High-performance and Embedded Systems for Cryptography

Implementations of the Hough Transform on the Embedded Multicore Processors

Framework for utilizing computational devices within simulation

Optimization of real-time ultrasound PCIe data streaming and OpenCL processing for SAFT imaging

Architectural improvements and 28 nm FPGA implementation of the APEnet+ 3D Torus network for hybrid HPC systems

NaNet:a low-latency NIC enabling GPU-based, real-time low level trigger systems

High-performance Dynamic Programming on FPGAs with OpenCL

FlexGrip: A Soft GPGPU for FPGAs

Recent source codes

SimSYCL: Synchronous, single-threaded, library-only SYCL implementation for debugging and verification

GPU plugin for PySCF

QArray

Celerity: High-level C++ for Accelerator Clusters

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

CIFAR-10 Airbench: 94% on CIFAR-10 in 3.29 second

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

OpenMC Monte Carlo Code

Polygeist: C/C++ frontend for MLIR

Parallel Gaussian process with kernel approximation in CUDA

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