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AFOCL: Portable OpenCL Programming of FPGAs via Automated Built-in Kernel Management

Topi Leppanen, Joonas Multanen, Leevi Leppänen, Pekka Jääskeläinen

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Tags: Computer science, FPGA, OpenCL, Package, performance portability

November 19, 2023 by hgpu

On the Three P’s of Parallel Programming for Heterogeneous Computing: Performance, Productivity, and Portability

Atharva Gondhalekar, Wu-chun Feng

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Tags: Computer science, FPGA, Heterogeneous systems, HLS, nVidia, nVidia GeForce RTX 3090, oneAPI, OpenCL, Performance, performance portability, SYCL

November 12, 2023 by hgpu

Performance portability analysis of SYCL with a classical CG on CPU, GPU, and FPGA

Julian Franquinet

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Tags: Benchmarking, Computer science, CUDA, FPGA, nVidia, nVidia Quadro GP100, Optimization, Performance, performance portability, SYCL

October 22, 2023 by hgpu

SYCL in the Edge: Performance Evaluation for Heterogeneous Acceleration

Youssef Faqir-Rhazoui, Carlos García

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Tags: Computer science, CUDA, FPGA, Heterogeneous systems, nVidia, nVidia Jetson Nano, Optical flow, Package, SYCL

October 22, 2023 by hgpu

Strega: An HTTP Server for FPGAs

Fabio Maschi, Gustavo Alonso

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Tags: Computer science, FPGA, OpenCL, Package

October 15, 2023 by hgpu

Automated Buffer Sizing of Dataflow Applications in a High-Level Synthesis Workflow

Alexandre Honorat, Mickaël Dardaillon, Hugo Miomandre, Jean-François Nezan

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Tags: Code generation, Computer science, FPGA, HLS, OpenCL, Package, Performance

October 8, 2023 by hgpu

Improving the Efficiency of OpenCL Kernels through Pipes

Mostafa Eghbali Zarch, Michela Becchi

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Tags: Computer science, FPGA, OpenCL, Performance, performance portability

September 17, 2023 by hgpu

Unified Shared Memory: Friend or Foe?

Juan Fumero Alfonso, Florin-Gabriel Blanaru, Athanasios Stratikopoulos, Steve Dohrmann, Sandhya Viswanathan, Christos-Efthymios Kotselidis

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Tags: Code generation, Computer science, CUDA, FPGA, Heterogeneous systems, Java, Memory, nVidia, nVidia GeForce RTX 3070, OpenCL

September 17, 2023 by hgpu

Fortran High-Level Synthesis: Reducing the barriers to accelerating HPC codes on FPGAs

Gabriel Rodriguez-Canal, Nick Brown, Tim Dykes, Jessica R. Jones, Utz-Uwe Haus

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Tags: Computer science, Fortran, FPGA, HLS, HPC, OpenCL, Performance

September 6, 2023 by hgpu

eGPU: A 750 MHz Class Soft GPGPU for FPGA

Martin Langhammer, George Constantinides

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Tags: Computer science, DSP, FPGA, Hardware Architecture

July 24, 2023 by hgpu

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Aurélien François Gilbert Bloch

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Tags: Compilers, Computer science, CUDA, Design space exploration, DSP, FPGA, Heterogeneous systems, nVidia, nVidia GeForce GTX 1660, nVidia GeForce RTX 3080 Ti, Package, Thesis

June 25, 2023 by hgpu

minimap2-fpga: Integrating hardware-accelerated chaining for efficient end-to-end long-read sequence mapping

Kisaru Liyanage, Hiruna Samarakoon, Sri Parameswaran, Hasindu Gamaarachchi

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Tags: Bioinformatics, Biology, Cloud, FPGA, OpenCL, Package, Sequence alignment

June 11, 2023 by hgpu

Coccinelle: a C code transformation engine using SmPL for matches, refactorings, and bug fixing

Advances in Semantic Patching for HPC-oriented Refactorings with Coccinelle

DuoReduce: MLIR's benchmark

Hardware-Assisted Software Testing and Debugging for Heterogeneous Computing

Shamrock: Multi-GPU hydrodynamics for astrophysics

The Shamrock code: I- Smoothed Particle Hydrodynamics on GPUs

LLMPerf: GPU Performance Modeling meets Large Language Models

Hercules: A Compiler for Productive Programming of Heterogeneous Systems

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high performance computing on graphics processing units: hgpu.org

AFOCL: Portable OpenCL Programming of FPGAs via Automated Built-in Kernel Management

On the Three P’s of Parallel Programming for Heterogeneous Computing: Performance, Productivity, and Portability

Performance portability analysis of SYCL with a classical CG on CPU, GPU, and FPGA

SYCL in the Edge: Performance Evaluation for Heterogeneous Acceleration

Strega: An HTTP Server for FPGAs

Automated Buffer Sizing of Dataflow Applications in a High-Level Synthesis Workflow

Improving the Efficiency of OpenCL Kernels through Pipes

Unified Shared Memory: Friend or Foe?

Fortran High-Level Synthesis: Reducing the barriers to accelerating HPC codes on FPGAs

eGPU: A 750 MHz Class Soft GPGPU for FPGA

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Recent source codes

Coccinelle: a C code transformation engine using SmPL for matches, refactorings, and bug fixing

DuoReduce: MLIR's benchmark

Shamrock: Multi-GPU hydrodynamics for astrophysics

LLMPerf: GPU Performance Modeling meets Large Language Models

Hercules: A Compiler for Productive Programming of Heterogeneous Systems

Celerity Runtime: High-level C++ for Accelerator Clusters

wgpy: WebGL accelerated numpy-compatible array library for web browser

Microbenchmarking OpenMP target offload with Catch2

SUperman: Highly Efficient Permanent Computation Library

TransCL: An Automatic CUDA-to-OpenCL Programs Transformation Framework

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